Get Design of a Computer: The Control Data 6600 PDF

By James E. Thornton

ISBN-10: 0673059537

ISBN-13: 9780673059536

It's been 5 years now given that Seymour Cray, a mythic determine even whereas alive, kicked the bucket because of an vehicle twist of fate within the Colorado Rockies. With Cray went the purpose guy for the U.S. excessive functionality computing group, an suggest for construction the quickest computer attainable at any time, a father determine to aspiring engineers, an Olympian straddling huge, immense investment specifications and important layout demanding situations, in brief, the Mozart of MIPS. The desktop that verified this popularity was once the keep watch over info 6600.

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Extra info for Design of a Computer: The Control Data 6600

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At the time of this entry a set of tags is also entered, which fully identify the nature of that particular storage reference. The storage address is sent immediately to the storage units on the storage address bus, at clock time t25. The hopper is designed to allow the information entered in register M1 to circulate through the other registers and return to Ml. A 75-nanosecond time interval exists between each register which results in a total recirculation time of 300 nanoseconds. For example: t00 —Enter M1 t25 —Address to Storage Address Bus t75 —M1 to M4 t150—M4 to M3 t225—M3 to M2 t300—M2 to MI (if not accepted) In each storage bank the lower five bits of the address are examined for a match.

171 175 BANK 3 BANK 2 BANK 1 172 176 4 173 BLOCK TRANSFER STARTS AT WORD ADDRESS 17058 WITH LENGTH 558 FIGURE 41 With four interleaved banks it is possible to achieve a time overlap. For a transfer rate equal to the maximum rate of Central Storage, one 60-bit word must transfer every minor cycle, or 100 nanoseconds. Each ECS unit requires a 3200-nanosecond cycle, moving eight 60-bit words. Therefore, four banks can be made to move thirty-two words in the time of one storage cycle. To accomplish this, one bank is initiated every 800 nanoseconds.

The time constant "t" may be calculated for this point from the capacitance per collector and the collector load resistor RL. 16 nanoseconds. 2 volt by load currents. 16 nanoseconds is consumed for the "turn-off " case, as shown in Figure 17. In fact, the rise time due to capacitance is shorter than the transistor turn-off characteristic. One can easily see that a faster transistor would require changes in this rather comfortable balance in order to be effective. The circuit of a flip-flop and its clear/set input are shown in Figure 18.

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Design of a Computer: The Control Data 6600 by James E. Thornton


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