By Debaprasad Das
An replacement to Copper-Based Interconnect Technology
With a rise admired for extra circuit elements on a unmarried chip, there's a growing to be desire for nanoelectronic units and their interconnects (a actual connecting medium made from skinny steel motion pictures among a number of electric nodes in a semiconducting chip that transmit indications from one element to a different with none distortion). Carbon Nanotube and Graphene Nanoribbon Interconnects explores new very important carbon nanomaterials, carbon nanotube (CNT) and graphene nanoribbon (GNR), and compares them with that of copper-based interconnects. those nanomaterials convey nearly 1,000 occasions extra current-carrying skill and considerably better suggest unfastened course than copper. as a result of their impressive houses, CNT and GNR may possibly quickly exchange conventional copper interconnects. devoted to proving their merits, this booklet covers the fundamental idea of CNT and GNR, and gives a finished research of the CNT- and GNR-based VLSI interconnects at nanometric dimensions.
Explore the capability purposes of CNT and Graphene for VLSI Circuits
The ebook begins with a quick creation of carbon nanomaterials, discusses the most recent examine, and info the modeling and research of CNT and GNR interconnects. It additionally describes undefined, thermal, and mechanical homes, and structural habit of those fabrics. moreover, it chronicles the development of those basic homes, explores attainable engineering functions and progress applied sciences, and considers functions for CNT and GNR except their use in VLSI circuits.
Comprising 8 chapters this text:
- Covers the fundamentals of carbon nanotube and graphene nanoribbon
- Discusses the expansion and characterization of carbon nanotube and graphene nanoribbon
- Presents the modeling of CNT and GNR as destiny VLSI interconnects
- Examines the applicability of CNT and GNR when it comes to numerous research works
- Addresses the timing and frequency reaction of the CNT and GNR interconnects
- Explores the sign integrity research for CNT and GNR interconnects
- Models and analyzes the applicability of CNT and GNR as strength interconnects
- Considers the destiny scope of CNT and GNR
Beneficial to VLSI designers operating during this sector, Carbon Nanotube and Graphene Nanoribbon Interconnects presents a whole figuring out of carbon-based fabrics and interconnect know-how, and equips the reader with enough wisdom in regards to the destiny scope of analysis and improvement for this rising topic.
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Extra resources for Carbon Nanotube and Graphene Nanoribbon Interconnects
The interconnect dimensions are as per 16-nm technology node. The bundle is assumed to be densely packed, that is, with zero spacing. ) CNT distribution in a bundle with different CNT diameter and spacing. 7d). Bundle width, w = 16 nm, and thickness, t = 32 nm. 8 nm (32-nm Technology Node) Dia. 7d Mean Dia. 3 153 71 28 95 30 7 57 11 1 26 2 0 223 133 67 170 80 27 133 48 10 96 22 2 253 193 127 207 145 74 177 113 43 148 82 19 223 219 184 170 176 133 133 150 101 96 126 71 153 193 209 95 145 161 57 113 134 26 82 110 82 133 184 35 80 133 14 48 101 3 22 71 34 71 127 9 30 74 1 11 43 0 2 19 1121 1013 926 781 686 609 572 494 433 395 338 292 Note: Spacing between CNTs is expressed as percentage of CNT diameter.
30] presented a model for 3D conductors to 1D CNTs to develop a transmission-line model. Pop et al. [31,32] presented a temperature-dependent model for CNT considering acoustic and optical phonon scatterings. Srivastava and Banerjee  analyzed the applicability of CNT bundles as interconnects for VLSI circuits. They developed a model to extract the electrical equivalent model of the CNT bundle-based interconnects. They studied local, intermediate, and global interconnects and found that CNT bundle has better performance over copper interconnects at the intermediate and global lengths.
The simulation program with integrated circuit emphasis (SPICE) compatible equivalent circuit of MOSFET-like CNTFET is proposed by Deng and Wong [79,80]. Sinha et al.  developed a noniterative physics-based compact model for CNT transistors and interconnects. 5 nm, the circuit can be more than 8× faster than that of 22-nm CMOS, with the tolerance to the variation in contact materials. Lin et al.  designed the static random access memory (SRAM) cell using MOSFET-like CNTFET. They used dual-chirality in the design.
Carbon Nanotube and Graphene Nanoribbon Interconnects by Debaprasad Das